You Can’t Tell the AMD and Intel Players Without a Scorecard

Let’s face it, keeping track of CPU trademarks is hard enough — you’re a serious geek if you can tell the difference between Xeon and Itanium. (The first is what Intel calls its 32-bit server CPUs, relatives of the desktop Pentium III and 4; the second is Intel’s separate 64-bit server family.)

But it’s ten times harder to keep track of all the codenames and buzzwords that get slung about when discussing different present and future CPUs, or even slightly different versions of the same CPU.

Between trade magazines and tech Web sites (the CPU Planet Forums come to mind), the flood of jargon that’s like secret-clubhouse talk to tech nerds can be a real problem for IT managers trying to separate real advances from vapor and hype. For instance, if you’ve been assigned to buy your company’s next 100 notebooks, you might want to know about Intel’s Banias (a mobile CPU due a few months from now), but if some hipster tells you, “I hear there’ll be nothing happening until Dothan,” he’s wrong — Intel, AMD, and your boss all have excellent reasons why you shouldn’t sit on your thumbs for a whole year.

So, whether you favor equine strains (AMD) or the rivers and towns of the Pacific Northwest (Intel), here’s a cross-indexed list of codenames and catch phrases now muddying the CPU market.

Appaloosa: This was to be the 0.13-micron-process version of AMD’s Duron (i.e., a Duron version of the current Athlon XP Thoroughbred, akin to the Duron/Morgan version of the old Athlon XP Palomino). But high-speed, “high-end” processors have pushed so quickly so deep into the “value” market (seen the new eMachines Athlon XP 2000+ desktop with DVD and CD-RW drives for $650?) that AMD canceled Appaloosa last spring.

Banias: Intel’s next notebook/laptop CPU, a battery-thrifty design which it hopes will elbow aside the mobile Pentium 4 (actually, the Banias core reportedly resembles the older, still marvelously efficient Pentium III) starting in the first quarter of 2003. It’s expected to debut at speeds of 1.3GHz and up, with a 400MHz system bus and 1MB of Level 2 cache.

Barton: The next (and presumably last) version of AMD’s Athlon XP; successor to the “Thoroughbred” Athlon XP 2700+ and 2800+ desktop CPUs announced last week. Barton is built on the same 0.13-micron process, but doubles the on-chip Level 2 cache from 256K to 512K, so pundits predict a roughly 10-percent performance boost. It’s expected in the first quarter of 2003, starting with a 2800+ model number.

ClawHammer: Cool jargon for the desktop and mobile versions of AMD’s forthcoming Hammer processor, scheduled to ship under some new variant of the Athlon brand in the first half of 2003 — model number 3200+? 3400+? — and move from an 0.13- to 0.09-micron process in the second half of the year. For servers and workstations, there’ll be a two-way ClawHammer DP version marketed under the Opteron label.

Deerfield: Sort of a 64-bit Celeron — a forthcoming economy version of Intel’s Itanium (actually Madison), with 1MB of Level 3 cache.

Dothan: What’ll be inside “Intel inside” notebooks in the fourth quarter of 2003 — the 90-nanometer-process successor to the forthcoming 0.13-micron Banias mobile CPU, reportedly to use the same 400MHz system bus but hike the Level 2 cache from 1MB to 2MB.

Foster: The Xeon (server and multiprocessing) variant of Intel’s 0.18-micron-process Pentium 4 Willamette.

Gallatin: A jumbo-cache (1MB or 2MB Level 2) upgrade of Intel’s P4-sibling Xeon for multiprocessor servers, expected at the end of this year.

Hammer: The generic name for AMD’s long-awaited, eighth-generation, 64-bit processor, arriving in the first half of 2003. Unlike Intel’s start-from-scratch 64-bit Itanium series, Hammer (a.k.a. K8) also runs existing 32-bit programs at top speed, without having to switch into an emulation mode. See ClawHammer, SledgeHammer, and Opteron.

Madison: The 0.13-micron-process successor to Intel’s current 0.18-micron process Itanium 2 (McKinley), with 6MB of Level 3 cache (Intel says a staggering 288 million of Madison’s even more staggering 500 million transistors will be cache SRAM). Slated for the second quarter of 2003.

McKinley: Intel’s current Itanium 2 server CPU, an 0.18-micron-process whopper with 32K of Level 1, 256K of Level 2, and either 1.5MB or 3MB of Level 3 cache.

Merced: The first of Intel’s Itanium 64-bit processor family, introduced last year.

Morgan: The current (1.0GHz through 1.3GHz) AMD Duron economy processors, basically 0.18-micron Palominos with one-quarter as much L2 cache (64K).

Nehalem: Way far off (2005) successor to Intel’s Prescott and Tejas; unlike them, it’ll represent a clean break from the Pentium 4 line — the next blank slate, so to speak, in Intel’s 32-bit processor progression. Gossip says it’ll debut on a 90-nanometer and then switch to a 65-nanometer process, with a clock speed of 1.8 googolhertz. (OK, we made up that last part.)

Nocona: The server flavor of Intel’s Prescott; it’ll succeed the current Xeon version of the Pentium 4, probably in the second half of 2003, probably starting at 3.2GHz.

Northwood: Today’s Intel Pentium 4 desktop processor, built on an 0.13-micron process with 512K of Level 2 cache. At this writing, the fastest version runs at 2.8GHz with a 533MHz front-side bus; a 3.06GHz chip with Intel’s Hyper-Threading technology — which fools software into thinking that a single-CPU system is a two-chip multiprocessor platform, yielding (Intel says) a performance gain of up to 25 percent, will ship at the end of this year.

Opteron: The trademark AMD will use for multiprocessor server and workstation versions of 2003’s Hammer CPU.

Palomino: AMD’s first Athlon XP (the XP 1500+ through 2100+), which succeeded the Athlon “Thunderbird” in October 2001. Equipped with 128K of Level 1 and 256K of Level 2 cache, it’s built on an 0.18-micron process.

Prescott: Due in the first half of 2003, it’ll move Intel’s desktop Pentium 4 from Northwood’s 0.13-micron to an 0.09-micron (90-nanometer) manufacturing process, just as Northwood succeeded the 0.18-micron Willamette. Best guess for its debut clock speed is 3.2GHz, with fanboys already hoping for 4.0GHz and 1MB of on-chip Level 2 cache. The Pentium 4’s front-side bus, which has evolved from 400MHz to 533MHz, should step up to 667MHz with Prescott.

Prestonia: Intel’s current Xeon, the server-duty sibling of the 0.13-micron Pentium 4 Northwood, with the same 400MHz and 533MHz system buses and 512K of Level 2 cache. When it appeared last February, it was the first CPU to implement Intel’s Hyper-Threading scheme.

SledgeHammer: The industrial-strength multiprocessing (up to eight-way) or enterprise server version of AMD’s Hammer 64-bit processor.

Tejas: Newly leaked codename for the enhanced successor to today’s Pentium 4 successor Prescott. On Intel’s drawing board for the first half of 2004.

Thoroughbred: Affectionately abbreviated as Tbred, this is AMD’s current Athlon XP desktop processor, built on an 0.13-micron process (versus the 0.18-micron process of Palomino) with 128K of Level 1 and 256K of Level 2 cache. Debuted with the Athlon XP 2200+ (June 2002); swiftly revised and enhanced with the “Thoroughbred B” core of the Athlon XP 2400+ and 2600+ (August/September 2002); boosted further by stepping from a 266MHz to 333MHz front-side bus with the Athlon XP 2700+ and 2800+ (November 2002).

Tualatin: The last, best revision of Intel’s Pentium III desktop processor, with 0.13-micron process architecture and a hefty 512K Level 2 cache. The Celeron/1.1A, /1.2, /1.3, and /1.4 value CPUs are Tualatins with 256K of L2 cache and a 100MHz front-side bus.

Willamette: The original, 0.18-micron-process version of Intel’s desktop Pentium 4 processor, available initially for 423-pin and later for 478-pin (same as the current 0.13-micron Northwood) sockets and equipped with a 400MHz front-side bus and 256K of Level 2 cache. The current 1.7GHz and 1.8GHz desktop Celerons are actually Pentium 4 siblings, Willamette chips with only 128K of L2 cache; the 2.0GHz Celeron is ditto with 0.13-micron manufacturing, making it a CeleNorthWillaron.

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