Startup Claims Embedded-Systems Breakthrough
Embedded systems design is all about having the right tool for the job. General-purpose processors (GPPs) like those in desktop PCs can be programmed to tackle virtually any computing job, but lack the performance of more specialized or task-optimized digital signal processors (DSPs). Still more specialization and performance is possible with application-specific integrated circuits (ASICs), often prototyped with field-programmable gate arrays (FPGAs). But these custom chips force device designers to move from relatively quick and simple software to more costly and time-consuming hardware programming.
This week, a Mountain View, Calif., company called Stretch Inc. announced that it’s squared the circle, or enabled hard-wired software, or vice versa: The Stretch S5000 series of software-configurable chips is the first to embed programmable logic within a processor architecture, combining the ease of software development of user-configurable GPPs with the parallelism and flexibility of FPGAs. Using Stretch’s C/C++ compiler, vendors can slash their development time while both optimizing and differentiating their products by creating new instructions for specific applications’ needs.
In fact, Stretch says, its software tools automatically identify what it calls application “hot spots” — sequences of operations involving tens or hundreds of instructions that must be repeated many times — and compile them into single custom instructions.
The process is not only much easier than having a programmer pore over low-level assembly code, but offers potentially huge performance gains: Performing encryption or digital video processing on blocks of data can be executed in one clock cycle, letting a 300MHz Stretch chip outperform 1GHz or 2GHz DSPs.
According to the company, this will let consumer, telecommunications, medical, or military device builders replace a whole bank of DSPs or GPPs — or a GPP plus expensive FPGAs — with one Stretch processor, while enjoying performance that conventional chips can’t match even if an application relies on unusual data types or operations. The S5000 chips will ship in the second half of this year, priced from $35 to $100 in OEM quantities.
RISC With Something Different
Stretch is a fabless semiconductor company, launched with Silicon Valley venture-capital backing in March 2002. The processor core of the S5000 is Tensilica Inc.’s 300MHz Xtensa, a 32-bit RISC engine licensed by some five dozen other embedded system-on-chip vendors; it shares the Stretch silicon with a software-configurable data path or area of programmable logic called the Instruction Set Extension Fabric (ISEF).
The ISEF has a high-bandwidth design with 32 128-bit registers and 128-bit bus access to memory. It works like a reconfigurable coprocessor alongside the Xtensa core, letting system designers define extensions to the processor instruction set using everyday C/C++ code. Stretch’s development tools center on MontaVista Linux, a popular OS in the embedded space.
There are three members of the S5000 family, all sharing what Stretch calls the S5 engine with 300MHz clock speed, 32K apiece of instruction and data cache, and 32K of dual-port data RAM. The first to ship, July’s S5610, is the fanciest — targeted at networking and military applications, with a 64-bit DDR400 ECC memory controller and 64-bit PCI-X plus as many as four Gigabit Ethernet interfaces.
Following in September will be the S5500, which features a plain 64-bit DDR400 controller and 32-bit PCI interface; it’s intended for medical instruments and office and studio equipment. November will see the cheapest, consumer-oriented version, the S5400, with a 32-bit DDR333 controller and single 10/100Mbps Ethernet link; it’s likely to power multimedia and wireless devices.